Seoul, Republic of Korea • +82-10-9368-1374 • taewoon_kang@korea.ac.kr • taewoon1374@gmail.com
Ph.D. student at Korea University researching computer architecture, AI accelerators, and processing-in-memory systems. My work centers on efficient hardware and system design for modern machine learning workloads, with experience spanning PIM architecture, ASIC design, RTL implementation, and architectural simulation.
United States | Conducting collaborative research under the supervision of Prof. Annavaram.
Korea | Developed spam detection methods using AI.
GPA: 4.35 / 4.5 | Advisor: Gunjae Koo | Seoul, Korea
GPA: 4.28 / 4.5 | Advisor: Yongwoo Kim | Cheonan, Korea
Thesis: An Implementation of CNN-based Real-Time Face Mask Detector using Jetson Nano
Implementation of a real-time face mask detection system using CNN on Jetson Nano.
Advisor: Yongwoo Kim
Taewoon Kang, Namhun Kim, Jihun Lee, Murali Annavaram, Gunjae Koo
Taewoon Kang, Namhun Kim, Geonwoo Choi, Taeweon Suh, Gunjae Koo
Sunchae Kim, Taewoon Kang, Sangwon Shin, Taeweon Suh, Yibin Yang, Gunjae Koo
Taewoon Kang, Geonwoo Choi, Taeweon Suh, Gunjae Koo
Seongpil Yang, Taewoon Kang
Sang-un Jo, Tae-woon Kang, Yongwoo Kim
Sang-un Jo, Tae-Woon Kang, Yongwoo Kim
Taewoon Kang, Yongwoo Kim
C (including Atmel and Keil), C++, Python (PyTorch), Verilog 2001, SystemVerilog
Synopsys EDA (Semi-custom ASIC design), Xilinx FPGA, Altera FPGA
ARM Cortex-M0/M3 IP implementation, RISC-V Simple Processor design, ASIC/Semi-custom chip design and verification
GEM5, DRAMsim3
Parallel Processing, AI Accelerator Architecture, Advanced Computer Architecture, Storage System Architecture, ARM Cortex-M Series IP Implementation, Electrical Circuit, Microelectronic Circuit, Semi-Custom ASIC Design with Synopsys Design Tool, VLSI Design, Digital Logic Circuit, Computer Architecture and Design, Design with Verilog, SoC Design, Semiconductor Physics, Semiconductor Fabrication Process, Calculus, Engineering Mathematics